PCBs include two main structures: traces and vias. Understanding the signal integrity of these structures requires 3D simulation to capture the complex interactions between them.

PCB stackup, ground via locations, material selection, trace length and routing all combine to create very custom environments that define the performance of the PCB.

Even with the best design standards, it is extremely difficult to quantify the effects of combining all these structures. With ECT’s signal integrity tools and expertise you can rest assured your test interface performance is optimized before fabrication.


PCB Layout

Topology

• Microstrip traces are higher speed than stripline but stripline offers better noise immunity. Simulation can compare and quantify the differences to determine which topology is optimal for any given application.

Material

• FR4, Nelco, Rogers – which one should be used? In simulation, we can quickly compare the performance and determine if the more costly Rogers is really necessary.

Length

• There is always a trade-off between trace length and performance. Simulation can quantify the difference between different trace lengths.

Routing

• Routing affects the signal integrity but it may be less than what you expect. We have done many simulations researching coupling and trace routing. We have implemented design standards based on these simulations.

Vias

• Vias are known for creating a discontinuity in the transmision path from the tester to the device. This discontinuity can be minimized by simulating and optimizing placement and PCB stackup.

Components

• Component placement can significantly effect performance.
• The impedance is dictated by the proximity of the signal to the closest return path. Because of this, the return path is just as important as the signal path.
• In this example, the signal path is designed properly, but the location of the bypass capacitor (used to couple to ground) is too far from the signal path.
• The location creates additional loop inductance from the return path and causes a significant impedance discontinuity.
• The result is a resonance at 5GHz.
• By moving the capacitor to bottom of board under DUT, the size of the return current path is greatly reduced. This reduces the discontinuity and improves performance, as the resonance moved from ~5GHz to ~10GHz.
• Simulation allows us to determine the root cause of the poor performance and to make design modifications to fix the problem .